A New Optimal Method for the Secure Design of Combinational Circuits against Hardware Trojans Using Interference Logic Locking

Effective resistance to intellectual property theft, reverse engineering, and hardware Trojan insertion in integrated circuit supply chains is increasingly essential, for which many solutions have been proposed. Accordingly, strong attacks are also designed this field. One way achieve the above goal obfuscation. The obfuscation method hides primary function of normal Netlist from attacker by adding several key gates original Netlist. functionality correct only if applied; otherwise, obfuscated. In recent years, various methods logic locking, most prominent protection technique since it can protect against untrusted items. Logic locking induces functional structural changes a design even before layout generation. We secured with secure based on interference mode. call our proposed Secure Interference Locking, SILL. SILL minimum controllability paths maximum fan-out. method, we reduced number required created Hamming distance between obscure outputs. addition, added circuit’s complete interference, AES algorithm used generate key. Our SILL, was simulated Vivado simulation environment; algorithms were prepared VHDL language allow parallel execution, then applied ISCAS85 benchmark circuits. By analyzing comparing results works, amount consumption has decreased (about 5% space about 0.15-nanosecond time delay). Then, SAT attack tested circuits that obfuscated execution second attempt 0.24 nanoseconds longer compared similar timed out fourth attempt. having less overhead higher speed more effective than existing conventional methods.